1. Field of the Invention
The present invention relates to a structure of a semiconductor device and a method for manufacturing the same, and more particularly to a structure of a semiconductor device capable of suppressing disconnection of two conductors caused by a shift of superposition to obtain a capacitor having excellent electrical characteristics, and a method for manufacturing the same.
2. Description of the Background Art
FIG. 14 is a sectional view showing a structure of a semiconductor device according to the art described in Japanese Unexamined Patent Publication No. 8-306664. In FIG. 14, the reference numeral 101 denotes a semiconductor substrate, the reference numeral 102 denotes an insulation film provided on the semiconductor substrate 101, and the reference numeral 103 denotes a contact buried in the insulation film 102 with a bottom face thereof abutting on a surface of the semiconductor substrate 101. The contact 103 includes a first contact layer 104 bonded to an internal wall and a bottom face of a contact hole formed on the insulation film 102, and a plug 105 provided on the first contact layer 104 and buried in the contact hole.
Furthermore, an upper wiring 107 is formed on the contact 103 through a second contact layer 106. A protective film 108 formed of an insulating material is provided on an upper face of the upper wiring 107. A sidewall 109 formed of an insulation film is provided on side sections of the upper wiring 107 and the protective film 108. The second contact layer 106 is provided on lower faces of the sidewall 109 and the upper wiring 107.
FIGS. 15 to 18 are sectional views sequentially showing a method for manufacturing the semiconductor device shown in FIG. 14. As shown in FIG. 15, a contact hole is first formed on an insulation film 102 provided on a semiconductor substrate 101. A first contact layer 104 is provided on at least an internal wall and a bottom face of the contact hole, and a conductive film acting as a plug 105 is formed. Thus, the contact hole is filled with a conductive material. Then, a whole face is subjected to etch-back to remove the plug 105 and the first contact layer 104 which are provided on the insulation film 102. Consequently, the first contact layer 104 and the plug 105 remain only in the contact hole. Thus, a contact 103 is formed.
Thereafter, a second contact layer 106a, a conductive film 107a acting as an upper wiring 107, and a protective film 108a are sequentially provided on the contact 103 and the insulation film 102 as shown in FIG. 16.
Next, a resist pattern 110 having a width which is almost equal to the diameter of the contact 103 is formed on the protective film 108a provided above the contact 103 as shown in FIG. 17. The protective film 108a and the conductive film 107a are sequentially subjected to anisotropic etching by using the resist pattern 110 as an etching mask. Consequently, a protective film 108 and the upper wiring 107 are obtained. At this time, a shift of superposition causes a shift in a region indicated at W so that a contact area of the contact 103 and the upper wiring 107 is reduced. After this processing, the resist pattern 110 is removed.
Then, a silicon oxide film is provided on exposed faces of the second contact layer 106a, the protective film 108 and the upper wiring 107 by a CVD method as shown in FIG. 18. Thereafter, anisotropic etching is performed to form a sidewall 109 comprising an insulation film on side sections of the protective film 108 and the upper wiring 107. Subsequently, the second contact layer 106a is subjected to etching by using the sidewall 109 and the protective film 108 as etching masks. Consequently, a second contact layer 106 remains on lower faces of the sidewall 109 and the upper wiring 107. Thus, the semiconductor device shown in FIG. 14 is obtained.
In the semiconductor device thus formed which is shown in FIG. 14, the contact 103 and the upper wiring 107 cause the shift (W) of superposition. However, the second contact layer 106 provided on the lower face of the upper wiring 107 also extends over the lower face of the sidewall 109. Therefore, it is possible to solve a problem that the first contact layer 104 forming the contact 103 is subjected to over-etching when performing etching for patterning the upper wiring 107.
However, a bad influence of the shift of superposition has given much more weight with finer structures of elements such as a contact, a wiring and the like. For example, in the case where the contact 103 and the upper wiring 107 cause the shift (W) of superposition and they are not superposed at all as shown in FIG. 19, electrical connection can be obtained only through an end of the second contact layer 106 provided between the contact 103 and the upper wiring 107. Although disconnection is not caused, a resistance is increased because a thickness of the second contact layer 106 is small. Therefore, excellent electrical characteristics cannot be obtained.
A first aspect of the present invention is directed to a semiconductor device comprising an insulation film provided on a substrate, a contact formed of a conductive material which is provided in the insulation film and is buried in a contact hole formed from a bottom face of the insulation film to a top face thereof, a conductor pattern formed on the insulation film, and a sidewall formed of a conductive material which is provided like a frame on a side face of the conductor pattern, wherein the conductor pattern and the contact are electrically connected to each other directly or through the sidewall.
A second aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein the sidewall provided like a frame on the side face of the conductor pattern is located on the contact, and a part of the sidewall is buried in the contact hole.
A third aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein the conductor pattern and the sidewall form a wiring.
A fourth aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, further comprising a dielectric film provided on surfaces of the conductor pattern and the sidewall, and a cell plate provided on a surface of the dielectric film, wherein the conductor pattern and the sidewall form a storage node, and a capacitor is formed by the storage node, the dielectric film and the cell plate.
A fifth aspect of the present invention is directed to the semiconductor device according to the fourth aspect of the present invention, wherein a film thickness of the conductor pattern is smaller than a vertical dimension of the sidewall, and the conductor pattern and the sidewall form a cylindrical storage node.
A sixth aspect of the present invention is directed to the semiconductor device according to the fourth aspect of the present invention, wherein a surface of the storage node which is in contact with the dielectric film is kept rough.
A seventh aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein a distance between the two adjacent conductor patterns is equivalent to a minimum dimension, and a distance between the sidewalls provided like a frame on faces on sides where the two conductor patterns are provided opposite to each other is smaller than the minimum dimension.
An eighth aspect of the present invention is directed to a method for manufacturing a semiconductor device, comprising the steps of forming a contact hole on an insulation film provided on a substrate from a top face of the insulation film to a bottom face thereof, providing a conductive material on the insulation film and filling an inside of the contact hole with the conductive material to obtain a contact, forming a resist pattern above the contact by performing a photolithographic step on the conductive material, selectively performing anisotropic etching for the conductive material by using the resist pattern as an etching mask to obtain a conductor pattern, thereby removing the resist pattern, forming a conductive film on a surface of the conductor pattern and that of the insulation film including the contact, and performing anisotropic etching for the conductive film by using the surface of the insulation film as an etching stopper to leave a conductive sidewall directly making contact with a side face of the conductor pattern.
A ninth aspect of the present invention is directed to the method for manufacturing a semiconductor device according to the eighth aspect of the present invention, further comprising the steps of forming a dielectric film on a surface of a storage node including the conductor pattern and the sidewall, and forming a cell plate on the dielectric film, wherein a capacitor including the storage node, the dielectric film and the cell plate is formed.
A tenth aspect of the present invention is directed to the method for manufacturing a semiconductor device according to the eighth aspect of the present invention, wherein the contact and the conductor pattern are electrically connected through the sidewall provided like a frame on the side face of the conductor pattern when at least a part of a top face of the contact and the conductor pattern are not superposed.
An eleventh aspect of the present invention is directed to a method for manufacturing a semiconductor device, comprising the steps of forming a contact hole on an insulation film provided on a substrate from a top face of the insulation film to a bottom face thereof, providing a conductive material on the insulation film and filling an inside of the contact hole with the conductive material to obtain a contact, forming a mask layer on the conductive material, forming a resist pattern above the contact by performing a photolithographic step on the mask layer, selectively performing anisotropic etching for the mask layer and the conductive material by using the resist pattern as an etching mask to obtain a mask and a conductor pattern, thereby removing the resist pattern, forming a conductive film on surfaces of the mask and the conductor pattern and a surface of the insulation film including a surface of the contact, performing anisotropic etching for the conductive film by using the surface of the insulation film as an etching stopper to leave a conductive sidewall directly making contact with side faces of the mask and the conductor pattern, thereby obtaining a cylindrical storage node including the conductor pattern and the sidewall, forming a dielectric film on a surface of the cylindrical storage node, and forming a cell plate on a surface of the dielectric film.
A twelfth aspect of the present invention is directed to the method for manufacturing a semiconductor device according to the eleventh aspect of the present invention, wherein the contact and the conductor pattern are electrically connected through the sidewall provided like a frame on the side face of the conductor pattern when at least a part of a top face of the contact and the conductor pattern are not superposed.
According to the first and second aspects of the present invention, even if the contact and the conductor pattern are not superposed due to a shift of photolithography, a width of the conductor pattern can effectively be increased because the sidewall formed of the conductive material is directly making contact with the side face of the conductor pattern. Consequently, the contact and the conductor pattern can be electrically connected well through the sidewall. If a top of the contact is subjected to over-etching due to the shift of superposition so that a recess is generated, a recess portion is filled with the conductive material forming the sidewall. Consequently, excellent electrical characteristics can be obtained.
According to the third aspect of the present invention, the wiring including the conductor pattern and the conductive sidewall is formed. Consequently, when a plurality of conductor patterns are serially provided with a minimum sampling dimension, a wiring width can effectively be increased by a horizontal dimension of the sidewall and a distance between the wirings can be reduced without expanding an element formation region.
According to the fourth aspect of the present invention, an influence of the shift of superposition of the contact and the storage node can be reduced, and excellent electrical connection can be obtained. In addition, it is possible to obtain a semiconductor device comprising a highly integrated capacitor.
According to the fifth aspect of the present invention, the cylindrical storage node is formed. Consequently, it is possible to obtain a semiconductor device comprising a capacitor having a large capacity.
According to the sixth aspect of the present invention, a surface of the storage node is made rough. Consequently, it is possible to obtain a semiconductor device comprising a capacitor having a larger capacity.
According to the seventh aspect of the present invention, if a plurality of conductor patterns are serially provided with a minimum sampling dimension, a wiring width can effectively be increased by a horizontal dimension of the sidewall and a distance between the wirings can be reduced without expanding an element formation region.
According to the eighth aspect of the present invention, the shift of superposition of the contact and the conductor pattern can be corrected by forming the conductive sidewall. Furthermore, the wiring width can be made greater without increasing a wiring pitch.
According to the ninth aspect of the present invention, an influence of the shift of superposition of the contact and the storage node can be reduced, and excellent electrical connection can be obtained. In addition, it is possible to obtain a semiconductor device comprising a highly integrated capacitor.
According to the tenth aspect of the present invention, even if the top face of the contact and the conductor pattern or storage node are not superposed due to the shift of superposition, it is possible to obtain excellent electrical connection with the contact through the conductive sidewall provided like a frame on the side face of the conductor pattern or storage node.
According to the eleventh aspect of the present invention, an influence of the shift of superposition of the contact and the storage node can be reduced and excellent electrical connection can be obtained. In addition, a semiconductor device comprising a capacitor having a large capacity can be obtained by formation of the cylindrical storage node.
According to the twelfth aspect of the present invention, even if the top face of the contact and the conductor pattern or storage node are not superposed due to the shift of superposition, it is possible to obtain excellent electrical connection with the contact through the conductive sidewall provided like a frame on the side face of the conductor pattern or storage node.
In order to solve the above-mentioned problems, it is an object of the present invention to provide a semiconductor device capable of performing excellent electrical connection of a contact to a wiring or an electrode for electrical connection with the contact even if an influence of a shift of superposition is increased with finer structures of elements, and a method for manufacturing the semiconductor device.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.